i386/3625: NatSemi Geode SC1100, broken TSC

[sthen@spacehopper.org]

>Number:         3625
>Category:       i386
>Synopsis:       NatSemi Geode SC1100 TSC broken
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    bugs
>State:          open
>Quarter:        
>Keywords:       
>Date-Required:
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Fri Jan 02 22:40:02 GMT 2004
>Closed-Date:
>Last-Modified:
>Originator:     Stuart Henderson
>Release:        3.4
>Organization:
net
>Environment:
	
	System      : OpenBSD 3.4
	Architecture: OpenBSD.i386
	Machine     : i386 (NatSemi Geode SC1100 used in Soekris net4801)
>Description:
	
The TSC on the NatSemi Geode SC1100 stops when the processor auto-halts
(power-saving mode). This makes it not usable as a system timer. This is
mentioned at http://soekris.com/Issue0003.htm.

I noticed excessive and increasing latency while gatewaying packets on a
mostly-idle system until other load was generated (e.g. ls -lR, find, etc)
with ALTQ. I then tried a kernel built with ALTQ_NOPCC but still had some
problems with network traffic freezing at low load, which was cured by
disabling TSC in machdep.c.

>How-To-Repeat:
	
1. Use a Soekris net4801 as a gateway. Ping from a system on one side of the 4801,
to a system on the other side. When load drops, pings sometimes pause until new
load is generated.

2. Use a Soekris net4801 as a gateway. Enable ALTQ and direct ICMP echo through
a queue. Ping from a system on one side of the 4801, to a system on the other side.
Times start OK, but when load drops, latency continually worsens.

>Fix:
	
I removed the TSC feature in machdep.c for NatSemi 6x86 chips, I haven't
made an effort to specifically detect the SC1100 or whether auto-halt is
enabled (apparently it is configurable by the machine vendor or BIOS),
I don't know whether that's needed.

$ diff -u9 machdep.c?rev=1.244 machdep.c
--- machdep.c?rev=1.244 Fri Jan  2 13:56:45 2004
+++ machdep.c   Fri Jan  2 13:58:56 2004
@@ -1548,18 +1548,19 @@
 void
 natsem6x86_cpu_setup(cpu_device, model, step)
 	const char *cpu_device;
 	int model, step;
 {
 #if defined(I586_CPU) || defined(I686_CPU)
 	extern int clock_broken_latch;

 	clock_broken_latch = 1;
+	cpu_feature &= ~CPUID_TSC;
 #endif
 }

 void
 intel586_cpu_setup(cpu_device, model, step)
 	const char *cpu_device;
 	int model, step;
 {
 #if defined(I586_CPU)


>Release-Note:
>Audit-Trail:
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