RE: 64-bit Architecture

[Nathan Binkert <binkertn@umich.edu>]

> It has been a while since some of the folks at HP and Intel explained this
> to me but what I understand makes the design fast is that the compiler
> supplies the CPU with information on the instruction stream so that better
> choices can be made when executing instructions out of order and making
> branch predictions.

Itanium is NOT an Out of Order processor.  The real benefit the compilers
get with Itanium is direct support for speculative memory access and
predication.  (This allows you to avoid branches at all.)  The rotating
register file for software pipelining support is also helpful.  
Esentially the idea of IA64 is to explicitly allow the compiler to do the
speculation that is normally done by an OOO machine.

This may be a problem given that there are many software companies that
don't even like to turn on any optimizations.  The most benefit that IA64
gets is from code that has compiled with profile based optimizations.

> If memory servers each 16 instructions are prefixed with a 8-bit context
> tag. If two groups of instructions are examined by the CPU and their tags
> are different then the CPU knows that the second group has no dependencies
> on the first and could be executed at the same time the first group is still
> being processed.
Instructions are processed in 'bundles' of three 40 bit instruction with a
8 bit format field. 


Nathan