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Re: sis 900
Hello Jay,
Monday, June 9, 2003, 6:44:11 PM, you wrote:
JB> On Mon, Jun 09, 2003 at 08:53:04AM -0700, Richard wrote:
>> Chances are you are using the newer SiS 962L chipset that uses a RealTek 8201
>> PHY with the Sis900 MAC
>>
>> A while ago I ported the FreeBSD driver over into OpenBSD and got this thing
>> working, but decided to use FreeBSD since I don't trust my own efforts for a
>> production machine!
>>
>> Rich
>>
>> On Saturday 07 June 2003 21:45, Georgi Makedonski wrote:
>> > Hello,
>> >
>> > I'm runnin OpenBSD 3.3 Box but have a lot of problem
>> > first is network my big problem Sis 900 ... on slackware
>> > and windows working fine but on OpenBSD have problem
>> > see that :
>> >
>> > #ifocnfig -m sis0
>> > sis0: flags=8802<BROADCAST,SIMPLEX,MULTICAST> mtu 1500
>> > address: 00:40:ca:c2:31:d9
>> > media: Ethernet none (none)
>> > supported media:
>> > media none
JB> I have a patch for 3.2 that fixes a number of issues found in the
JB> NetBSD and Linux drivers since the initial sis900 port to OpenBSD.
JB> I submitted it but 3.3 was already in code freeze so the patch was
JB> "obsolete." I haven't had time to port it to 3.3 yet.
JB> The patch adds recognition and some "special" code to support the
JB> SiS 635/735 chipset and the so-called 900B. I have tested the driver
JB> on my K7S5A motherboard with 32-STABLE and it seems to be working
JB> just fine. I have also fixed a bug in the handling of the multicast
JB> hash table. I'm not sure whether the bug was benign, but the 635 and 900B
JB> have larger hash tables. Not initializing the extra entries seemed like
JB> a bad idea. :)
JB> FWIW the patch is below. As always, YMMV...
JB> Regards,
JB> Jay
JB> Index: src/sys/dev/pci/if_sisreg.h
JB> ===================================================================
JB> RCS file: /cvs/src/sys/dev/pci/if_sisreg.h,v
JB> retrieving revision 1.10
JB> diff -u -r1.10 if_sisreg.h
JB> --- src/sys/dev/pci/if_sisreg.h 2 Jul 2002 16:44:25 -0000 1.10
JB> +++ src/sys/dev/pci/if_sisreg.h 3 Apr 2003 05:00:52 -0000
JB> @@ -372,6 +372,8 @@
JB> #define SIS_REV_630S 0x0082
JB> #define SIS_REV_630EA1 0x0083
JB> #define SIS_REV_630ET 0x0084
JB> +#define SIS_REV_635 0x0090
JB> +#define SIS_REV_900B 0x0003
JB> struct sis_type {
JB> u_int16_t sis_vid;
JB> @@ -403,6 +405,8 @@
JB> caddr_t sc_listkva;
JB> bus_dmamap_t sc_rx_sparemap;
JB> bus_dmamap_t sc_tx_sparemap;
JB> + u_int8_t sis_rev;
JB> + u_int8_t hash_size;
JB> };
JB> /*
JB> Index: src/sys/dev/pci/if_sis.c
JB> ===================================================================
JB> RCS file: /cvs/src/sys/dev/pci/if_sis.c,v
JB> retrieving revision 1.27
JB> diff -u -r1.27 if_sis.c
JB> --- src/sys/dev/pci/if_sis.c 31 Jul 2002 16:58:20 -0000 1.27
JB> +++ src/sys/dev/pci/if_sis.c 3 Apr 2003 05:01:03 -0000
JB> @@ -1,4 +1,4 @@
JB> -/* $OpenBSD: if_sis.c,v 1.27 2002/07/31 16:58:20 jason Exp $ */
JB> +/* $OpenBSD: if_sis.c,v 1.27+ 2002/07/31 16:58:20 jason Exp $ */
JB> /*
JB> * Copyright (c) 1997, 1998, 1999
JB> * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
JB> @@ -58,6 +58,10 @@
JB> * longword aligned.
JB> */
JB> +/* Modified by jay@rootaction.net for 635A (rev 0x90), tested on K7S5A
JB> + * Also added support for 900B (rev 0x03), untested.
JB> + * The 635 and 900B actually have a 256-bit multicast hash table.
JB> + */
JB> #include "bpfilter.h"
JB> #include "vlan.h"
JB> @@ -384,8 +388,9 @@
JB> return(val);
JB> }
- if (sc->>sis_type == SIS_TYPE_900 && phy != 0)
JB> - return(0);
+ if (sc->>sis_type == SIS_TYPE_900 &&
+ sc->>sis_rev < SIS_REV_635 && phy != 0)
JB> + return(0);
JB> CSR_WRITE_4(sc, SIS_PHYCTL, (phy << 11) | (reg << 6) | SIS_PHYOP_READ);
JB> SIS_SETBIT(sc, SIS_PHYCTL, SIS_PHYCTL_ACCESS);
JB> @@ -481,6 +486,9 @@
JB> if (sc->sis_type == SIS_TYPE_83815)
JB> return((crc >> 23) & 0x1FF);
+ if ((sc->>sis_rev == SIS_REV_635) || (sc->sis_rev == SIS_REV_900B))
JB> + return (crc >> 24);
JB> +
JB> return((crc >> 25) & 0x0000007F);
JB> }
JB> @@ -555,7 +563,7 @@
JB> filtsave = CSR_READ_4(sc, SIS_RXFILT_CTL);
JB> /* first, zot all the existing hash bits */
JB> - for (i = 0; i < 8; i++) {
JB> + for (i = 0; i < sc->hash_size; i++) {
JB> CSR_WRITE_4(sc, SIS_RXFILT_CTL, (4 + ((i * 16) >> 4)) << 16);
JB> CSR_WRITE_4(sc, SIS_RXFILT_DATA, 0);
JB> }
JB> @@ -750,6 +758,17 @@
JB> }
JB> printf(": %s", intrstr);
+ sc->>sis_rev = PCI_REVISION(pa->pa_class);
JB> +
JB> + /* revision 635 has 256 bit hash. others too, not implemented yet. */
JB> +
+ if ((sc->>sis_rev == SIS_REV_635) ||
+ (sc->>sis_rev == SIS_REV_900B)) {
+ sc->>hash_size = 16;
JB> + } else {
+ sc->>hash_size = 8;
JB> + }
JB> +
JB> /* Reset the adapter. */
JB> sis_reset(sc);
JB> @@ -810,16 +829,15 @@
JB> * requires some datasheets that I don't have access
JB> * to at the moment.
JB> */
JB> - command = pci_conf_read(pc, pa->pa_tag,
JB> - PCI_CLASS_REG) & 0x000000ff;
JB> - if (command == SIS_REV_630S ||
JB> - command == SIS_REV_630E)
JB> + if (sc->sis_rev == SIS_REV_630S ||
JB> + sc->sis_rev == SIS_REV_630E ||
JB> + sc->sis_rev == SIS_REV_630EA1)
JB> sis_read_cmos(sc, pa, (caddr_t)&sc->arpcom.ac_enaddr,
JB> 0x9, 6);
JB> else
JB> #endif
JB> - if (command == SIS_REV_630EA1 ||
JB> - command == SIS_REV_630ET)
JB> + if (sc->sis_rev == SIS_REV_635 ||
JB> + sc->sis_rev == SIS_REV_630ET)
JB> sis_read_630ea1_enaddr(sc, pa);
JB> else
JB> sis_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
JB> @@ -1371,7 +1389,7 @@
JB> sc->sis_ldata->sis_tx_list[cur].sis_mbuf = m_head;
JB> sc->sis_ldata->sis_tx_list[cur].sis_ctl &= ~SIS_CMDSTS_MORE;
JB> sc->sis_ldata->sis_tx_list[*txidx].sis_ctl |= SIS_CMDSTS_OWN;
- sc->>sis_cdata.sis_tx_cnt += i - 1;
+ sc->>sis_cdata.sis_tx_cnt += i;
JB> *txidx = frag;
JB> bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
JB> Index: src/sys/dev/pci/if_sisreg.h
JB> ===================================================================
JB> RCS file: /cvs/src/sys/dev/pci/if_sisreg.h,v
JB> retrieving revision 1.10
JB> diff -u -r1.10 if_sisreg.h
JB> --- src/sys/dev/pci/if_sisreg.h 2 Jul 2002 16:44:25 -0000 1.10
JB> +++ src/sys/dev/pci/if_sisreg.h 3 Apr 2003 05:00:52 -0000
JB> @@ -372,6 +372,8 @@
JB> #define SIS_REV_630S 0x0082
JB> #define SIS_REV_630EA1 0x0083
JB> #define SIS_REV_630ET 0x0084
JB> +#define SIS_REV_635 0x0090
JB> +#define SIS_REV_900B 0x0003
JB> struct sis_type {
JB> u_int16_t sis_vid;
JB> @@ -403,6 +405,8 @@
JB> caddr_t sc_listkva;
JB> bus_dmamap_t sc_rx_sparemap;
JB> bus_dmamap_t sc_tx_sparemap;
JB> + u_int8_t sis_rev;
JB> + u_int8_t hash_size;
JB> };
JB> /*
JB> Index: src/sys/dev/pci/if_sis.c
JB> ===================================================================
JB> RCS file: /cvs/src/sys/dev/pci/if_sis.c,v
JB> retrieving revision 1.27
JB> diff -u -r1.27 if_sis.c
JB> --- src/sys/dev/pci/if_sis.c 31 Jul 2002 16:58:20 -0000 1.27
JB> +++ src/sys/dev/pci/if_sis.c 3 Apr 2003 05:01:03 -0000
JB> @@ -1,4 +1,4 @@
JB> -/* $OpenBSD: if_sis.c,v 1.27 2002/07/31 16:58:20 jason Exp $ */
JB> +/* $OpenBSD: if_sis.c,v 1.27+ 2002/07/31 16:58:20 jason Exp $ */
JB> /*
JB> * Copyright (c) 1997, 1998, 1999
JB> * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
JB> @@ -58,6 +58,10 @@
JB> * longword aligned.
JB> */
JB> +/* Modified by jay@rootaction.net for 635A (rev 0x90), tested on K7S5A
JB> + * Also added support for 900B (rev 0x03), untested.
JB> + * The 635 and 900B actually have a 256-bit multicast hash table.
JB> + */
JB> #include "bpfilter.h"
JB> #include "vlan.h"
JB> @@ -384,8 +388,9 @@
JB> return(val);
JB> }
- if (sc->>sis_type == SIS_TYPE_900 && phy != 0)
JB> - return(0);
+ if (sc->>sis_type == SIS_TYPE_900 &&
+ sc->>sis_rev < SIS_REV_635 && phy != 0)
JB> + return(0);
JB> CSR_WRITE_4(sc, SIS_PHYCTL, (phy << 11) | (reg << 6) | SIS_PHYOP_READ);
JB> SIS_SETBIT(sc, SIS_PHYCTL, SIS_PHYCTL_ACCESS);
JB> @@ -481,6 +486,9 @@
JB> if (sc->sis_type == SIS_TYPE_83815)
JB> return((crc >> 23) & 0x1FF);
+ if ((sc->>sis_rev == SIS_REV_635) || (sc->sis_rev == SIS_REV_900B))
JB> + return (crc >> 24);
JB> +
JB> return((crc >> 25) & 0x0000007F);
JB> }
JB> @@ -555,7 +563,7 @@
JB> filtsave = CSR_READ_4(sc, SIS_RXFILT_CTL);
JB> /* first, zot all the existing hash bits */
JB> - for (i = 0; i < 8; i++) {
JB> + for (i = 0; i < sc->hash_size; i++) {
JB> CSR_WRITE_4(sc, SIS_RXFILT_CTL, (4 + ((i * 16) >> 4)) << 16);
JB> CSR_WRITE_4(sc, SIS_RXFILT_DATA, 0);
JB> }
JB> @@ -750,6 +758,17 @@
JB> }
JB> printf(": %s", intrstr);
+ sc->>sis_rev = PCI_REVISION(pa->pa_class);
JB> +
JB> + /* revision 635 has 256 bit hash. others too, not implemented yet. */
JB> +
+ if ((sc->>sis_rev == SIS_REV_635) ||
+ (sc->>sis_rev == SIS_REV_900B)) {
+ sc->>hash_size = 16;
JB> + } else {
+ sc->>hash_size = 8;
JB> + }
JB> +
JB> /* Reset the adapter. */
JB> sis_reset(sc);
JB> @@ -810,16 +829,15 @@
JB> * requires some datasheets that I don't have access
JB> * to at the moment.
JB> */
JB> - command = pci_conf_read(pc, pa->pa_tag,
JB> - PCI_CLASS_REG) & 0x000000ff;
JB> - if (command == SIS_REV_630S ||
JB> - command == SIS_REV_630E)
JB> + if (sc->sis_rev == SIS_REV_630S ||
JB> + sc->sis_rev == SIS_REV_630E ||
JB> + sc->sis_rev == SIS_REV_630EA1)
JB> sis_read_cmos(sc, pa, (caddr_t)&sc->arpcom.ac_enaddr,
JB> 0x9, 6);
JB> else
JB> #endif
JB> - if (command == SIS_REV_630EA1 ||
JB> - command == SIS_REV_630ET)
JB> + if (sc->sis_rev == SIS_REV_635 ||
JB> + sc->sis_rev == SIS_REV_630ET)
JB> sis_read_630ea1_enaddr(sc, pa);
JB> else
JB> sis_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
JB> @@ -1371,7 +1389,7 @@
JB> sc->sis_ldata->sis_tx_list[cur].sis_mbuf = m_head;
JB> sc->sis_ldata->sis_tx_list[cur].sis_ctl &= ~SIS_CMDSTS_MORE;
JB> sc->sis_ldata->sis_tx_list[*txidx].sis_ctl |= SIS_CMDSTS_OWN;
- sc->>sis_cdata.sis_tx_cnt += i - 1;
+ sc->>sis_cdata.sis_tx_cnt += i;
JB> *txidx = frag;
JB> bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
Ok I check my if_sis.c and if_sisrer.h all is ok
but the problem is in RealTek 8201 PHY
see from openbsd :
...
uhub2: vendor 0x0000 OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub2: 2 ports with 2 removable, self powered
"SIS 7002 USB" rev 0x00 at pci0 dev 3 function 3 not configured
sis0 at pci0 dev 4 function 0 "SIS 900 10/100BaseTX" rev 0x90: irq 5
address 00:40:ca:c2:31:d9
wi0 at pci0 dev 6 function 0 "Intersil PRISM2.5 Mini-PCI WLAN" rev
0x01: irq 10
wi0: PRISM2.5 ISL3874A(Mini-PCI), Firmware 1.1.1 (primary), 1.6.3
(station), address 00:07:ca:01:15:43
cbb0 at pci0 dev 12 function 0 "O2 Micro Inc OZ6912 and OZ6972
CardBus" rev 0x00: irq 10
isa0 at pcib0
...
no phy device
and see this dmesg from freebsd 4.8:
....
sis0: <SiS 900 10/100BaseTX> port 0x1800-0x18ff mem
0xd0004000-0xd0004fff irq 5 at device 4.0 on pci0
sis0: Ethernet address: 00:40:ca:c2:31:d9
miibus0: <MII bus> on sis0
rlphy0: <RTL8201L 10/100 media interface> on miibus0
rlphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
....
can you help me to write patch for this phy ?
I am too lame in C development .... :((
--
Best regards,
Georgi mailto:0x00@rambler.ru
- References:
- sis 900
- From: Georgi Makedonski <0x00@rambler.ru>
- Re: sis 900
- From: Richard <richard@praxistech.com>
- Re: sis 900
- From: Jay Bolton <jay@rootaction.net>