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F0 0F Workaround
On Sunday, December 7, Blair Sadewitz wrote:
>
> Theo told me to ask you for an F0 0F workaround patch. Could you help me?
I can try. Attached to the end of this message is my current workaround.
I would like people to test, and tell me if it works for them. The patches
should apply to a current system, but they might have some "fluff" in them,
as I have other changes to the files in question.
I'd appreciate it if someone with a clean system could apply & test this
patch, and if it works, to commit it to the repo.
Thanks,
--Toby.
*----------------------------------------------------------------------------*
| Tobias Weingartner | Email: weingart@BrandonU.Ca | Need a Unix sys-admin? |
| 6B-1137 Lorne Ave. |-----------------------------| Send E-Mail for resume, |
| Brandon, Canada | Unix Guru? Admin, Sys-Prgmr | and other details... |
|----------------------------------------------------------------------------|
| %SYSTEM-F-ANARCHISM, The operating system has been overthrown |
*----------------------------------------------------------------------------*
Index: i386/genassym.cf
===================================================================
RCS file: /cvs/src/sys/arch/i386/i386/genassym.cf,v
retrieving revision 1.5
diff -u -r1.5 genassym.cf
--- genassym.cf 1997/10/19 06:34:23 1.5
+++ genassym.cf 1997/12/08 21:31:32
@@ -108,6 +108,8 @@
define TF_CS offsetof(struct trapframe, tf_cs)
define TF_TRAPNO offsetof(struct trapframe, tf_trapno)
define TF_EFLAGS offsetof(struct trapframe, tf_eflags)
+define TF_EIP offsetof(struct trapframe, tf_eip)
+define TF_ERR offsetof(struct trapframe, tf_err)
define FRAMESIZE sizeof(struct trapframe)
Index: i386/locore.s
===================================================================
RCS file: /cvs/src/sys/arch/i386/i386/locore.s,v
retrieving revision 1.36
diff -u -r1.36 locore.s
--- locore.s 1997/10/22 23:37:12 1.36
+++ locore.s 1997/12/08 21:31:43
@@ -1931,6 +1931,19 @@
TRAP(T_STKFLT)
IDTVEC(prot)
TRAP(T_PROTFLT)
+#ifdef I586_CPU
+IDTVEC(f00f_redirect)
+ pushl $T_PAGEFLT
+ INTRENTRY
+ testb $PGEX_U,TF_ERR(%esp)
+ jnz calltrap
+ movl %cr2,%eax
+ subl _idt,%eax
+ cmpl $(6*8),%eax
+ jne calltrap
+ movb $T_PRIVINFLT,TF_TRAPNO(%esp)
+ jmp calltrap
+#endif
IDTVEC(page)
TRAP(T_PAGEFLT)
IDTVEC(rsvd)
Index: i386/machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/i386/i386/machdep.c,v
retrieving revision 1.66
diff -u -r1.66 machdep.c
--- machdep.c 1997/12/02 05:06:41 1.66
+++ machdep.c 1997/12/08 21:31:51
@@ -489,6 +474,10 @@
calibrate_cyclecounter();
printf(" %d MHz", pentium_mhz);
}
+ if(!strcmp(cpu_model, "Pentium (GenuineIntel 586-class CPU)")){
+ fix_f00f();
+ printf("\nCPU: F00F bug workaround installed");
+ }
#endif
printf("\n");
@@ -1079,7 +1068,8 @@
union descriptor gdt[NGDT];
union descriptor ldt[NLDT];
-struct gate_descriptor idt[NIDT];
+struct gate_descriptor idt_region[NIDT];
+struct gate_descriptor *idt = idt_region;
extern struct user *proc0paddr;
@@ -1139,6 +1129,45 @@
IDTVEC(fpu), IDTVEC(align),
IDTVEC(syscall), IDTVEC(osyscall);
+#if defined(I586_CPU)
+extern IDTVEC(f00f_redirect);
+pt_entry_t *pmap_pte __P((pmap_t, vm_offset_t));
+
+int cpu_f00f_bug = 0;
+
+void
+fix_f00f()
+{
+ struct region_descriptor region;
+ vm_offset_t va;
+ pt_entry_t *pte;
+ void *p;
+
+ /* Allocate two new pages */
+ va = kmem_alloc(kernel_map, NBPG*2);
+ p = (void *)(va + NBPG - 7*sizeof(*idt));
+
+ /* Copy over old IDT */
+ bcopy(idt, p, sizeof(idt_region));
+ idt = p;
+
+ /* Fix up paging redirect */
+ setgate(&idt[ 14], &IDTVEC(f00f_redirect), 0, SDT_SYS386TGT,
+ SEL_KPL, GCODE_SEL);
+
+ /* Map first page RO */
+ pte = pmap_pte(pmap_kernel(), va);
+ *pte &= ~PG_RW;
+
+ /* Reload idtr */
+ setregion(®ion, idt, sizeof(idt_region) - 1);
+ lidt(®ion);
+
+ /* Tell the rest of the world */
+ cpu_f00f_bug = 1;
+}
+#endif
+
void
init386(first_avail)
vm_offset_t first_avail;
@@ -1214,7 +1227,7 @@
setregion(®ion, gdt, sizeof(gdt) - 1);
lgdt(®ion);
- setregion(®ion, idt, sizeof(idt) - 1);
+ setregion(®ion, idt, sizeof(idt_region) - 1);
lidt(®ion);
#if NISA > 0
@@ -1414,8 +1418,8 @@
* Try to cause a triple fault and watchdog reset by setting the
* IDT to point to nothing.
*/
- bzero((caddr_t)idt, sizeof(idt));
- setregion(®ion, idt, sizeof(idt) - 1);
+ bzero((caddr_t)idt, sizeof(idt_region));
+ setregion(®ion, idt, sizeof(idt_region) - 1);
lidt(®ion);
__asm __volatile("divl %0,%1" : : "q" (0), "a" (0));
Index: include/cpu.h
===================================================================
RCS file: /cvs/src/sys/arch/i386/include/cpu.h,v
retrieving revision 1.17
diff -u -r1.17 cpu.h
--- cpu.h 1997/10/25 21:47:27 1.17
+++ cpu.h 1997/12/08 21:31:52
@@ -140,6 +140,10 @@
extern struct cpu_nameclass i386_cpus[];
#ifdef I586_CPU
extern int pentium_mhz;
+
+/* F00F bug fix stuff for pentium cpu */
+extern int cpu_f00f_bug;
+void fix_f00f __P((void));
#endif
/* autoconf.c */
Index: include/segments.h
===================================================================
RCS file: /cvs/src/sys/arch/i386/include/segments.h,v
retrieving revision 1.5
diff -u -r1.5 segments.h
--- segments.h 1997/04/17 03:44:51 1.5
+++ segments.h 1997/12/08 21:31:53
@@ -128,7 +128,8 @@
#ifdef _KERNEL
extern union descriptor gdt[], ldt[];
-extern struct gate_descriptor idt[];
+extern struct gate_descriptor idt_region[];
+extern struct gate_descriptor *idt;
void setgate __P((struct gate_descriptor *, void *, int, int, int, int));
void setregion __P((struct region_descriptor *, void *, size_t));
Index: isa/isa_machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/i386/isa/isa_machdep.c,v
retrieving revision 1.22
diff -u -r1.22 isa_machdep.c
--- isa_machdep.c 1997/09/24 22:28:16 1.22
+++ isa_machdep.c 1997/12/08 21:31:55
@@ -62,7 +62,6 @@
/* default interrupt vector table entries */
typedef (*vector) __P((void));
extern vector IDTVEC(intr)[], IDTVEC(fast)[];
-extern struct gate_descriptor idt[];
void isa_strayintr __P((int));
void intr_calculatemasks __P((void));
int fakeintr __P((void *));