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people with intel 82443BX chipset
- To: tech_(_at_)_openbsd_(_dot_)_org
- Subject: people with intel 82443BX chipset
- From: hshoexer_(_at_)_openbsd_(_dot_)_org
- Date: Wed, 9 Mar 2005 22:34:39 +0100
- Mail-followup-to: hshoexer_(_at_)_openbsd_(_dot_)_org, tech_(_at_)_openbsd_(_dot_)_org
Hi,
everybody with an intel 82443BX chipset on her mainboard, please try this
diff.
Background:
the data sheet of the intel 82443BX host bridge says bits 1:0 of the
configuration address register are reserved, ie. addresses have to be 32bit
aligned. So, 0x76 is truncated to 0x74.
The diff below should fix this.
Report success to me, regression to tech_(_at_)__(_dot_)_
Thanks!
Index: pchb.c
===================================================================
RCS file: /cvs/openbsd/src/sys/arch/i386/pci/pchb.c,v
retrieving revision 1.44
diff -u -p -r1.44 pchb.c
--- pchb.c 13 Jan 2005 00:43:01 -0000 1.44
+++ pchb.c 9 Mar 2005 15:41:47 -0000
@@ -86,8 +86,8 @@
#define PCISET_INTEL_BRIDGE_NUMBER(reg) (((reg) >> 8) & 0xff)
#define PCISET_INTEL_PCI_BUS_NUMBER(reg) (((reg) >> 16) & 0xff)
-#define PCISET_INTEL_SDRAMC_REG 0x76
-#define PCISET_INTEL_SDRAMC_IPDLT (1 << 8)
+#define PCISET_INTEL_SDRAMC_REG 0x74
+#define PCISET_INTEL_SDRAMC_IPDLT (1 << 24)
/* XXX should be in dev/ic/i82424{reg.var}.h */
#define I82424_CPU_BCTL_REG 0x53
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